Predictive Pipelines: Using AI to Catch Hardware Anomalies in Embedded CI/CD

By Michael Anthony

Elevator Pitch

Passing CI tests shouldn’t mean deploying firmware that drains IoT batteries. I’ll show how to inject AI anomaly detection into hardware CI pipelines to analyze physical telemetry and catch hardware bugs before they ever reach deployment.

Description

In traditional software DevOps, a green checkmark means you are ready to ship. If the code compiles and the unit tests pass, you deploy. But in the world of IoT, robotics, and embedded systems, that green checkmark can be a dangerous illusion.

What happens when a developer pushes a perfectly valid, compiling block of C++ that inadvertently keeps a microcontroller’s Wi-Fi radio powered on for three extra seconds? Standard CI/CD passes the build. The physical reality? Your fleet of edge devices drains its batteries in a matter of days, resulting in catastrophic downtime and incredibly expensive manual hardware resets in the field.

As an Electrical Engineering student navigating the DevOps ecosystem, I’ve realized our deployment pipelines have a massive blind spot: they are entirely blind to analog signals.

In this session, we will bridge the gap between physical hardware constraints and agile software delivery by building a “Smarter Pipeline.” Moving beyond generic AIOps, we will explore a practical, non-generative AI use case: injecting lightweight machine learning directly into Hardware-in-the-Loop (HIL) automated testing.

Using a live, physical demonstration with an ESP32 microcontroller and a current sensor, I will show you how to:

Bridge the Physical and Digital: Stream real-time analog telemetry (voltage, current) from a physical test rig directly into a CI/CD runner.

Train the Baseline: Use unsupervised Machine Learning (Isolation Forests) to establish a normal power-consumption signature for your hardware.

Halt the Fire: Configure your pipeline to automatically abort a deployment if the new firmware code causes an erratic physical power spike, even if all software tests pass.

Whether you are managing fleets of Raspberry Pis, industrial PLCs, or just want to see a fresh, physical application of AI in DevOps, you will walk away with actionable strategies to stop hardware fires before they ever leave the testing branch.

Notes

As an Electrical Engineering student bridging into DevOps, I offer a unique perspective on a critical industry blind spot: applying CI/CD to physical edge devices. This talk provides a practical, non-generative AI solution to catch hardware degradation using a live, self-contained Hardware-in-the-Loop (HIL) demo (an ESP32 and local laptop runner, completely independent of venue Wi-Fi). Fully aware of the “live demo curse,” I will have a high-quality, pre-recorded screencast backup ready to ensure a seamless presentation regardless of technical constraints.

Attendees will leave with a QR code linking to a public GitHub repo containing all the boilerplate code (C++, Python, YAML) to build their own physical CI/CD pipelines, and while proposed for 30 minutes, this session can easily scale to 15 or 45 minutes to perfectly fit your schedule tracks.